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JUL-29-E085 16:45 FROM : BSTZ 



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TO:USPTO 



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AppKNo. 10/774,166 

Amdt. Dated 07-29-2005 

Reply to Office action of 0C> 14-2005 

Amendments to the Claims: 

This listing of claim* will replace all prior versions, and listings, of claims in the application: 

Listing of Claims: 

1. (original) A method comprising: 

providing a first wafer having a stack structure of a first base substrate, a layer of 
relaxed film, and a first layer of strained film, 

depositing a layer of oxide onto the layer of strained film to provide an adhesion 
surface to the first wafer; 

providing a second wafer, the second wafer being a silicon on insulation (SOD 
wafer having a stack structure of a second base substrate and a layer of oxidized film; 

attaching the first and second wafers; and 

heating the first and second wafers at a first temperature to cause a silicon dioxide 
(Si0 2 ) adhesion of the first substrate to the second substrate. 

2. (original) The method of claim 1 further comprising: 

implanting hydrogen onto the first wafer before depositing the layer of oxide onto 
the second layer of strained fi 1m to cneate an embrittled region in the layer of relaxed film. 

3. (original) The method of claim 2 further comprising: 

heating the first and second wafers at a second temperature to delaminate the two 
wafers along the embrittled region to form the second wafer having the layer of relaxed film. 

4. (original) The method of claim 3 further comprising: 

etching the relaxed film on the surface of the second wafer to expose the strained 

film. 

5. (original) The method of claim 1 wherein the first and second base substrates are 
made of silicon material. 

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Appl No. I0/774J66 

Amdt Daied 07-29-2005 

Reply to Office action of 06-14-2005 

6. (previously presented) The method of claim 1 wherein the layer of relaxed film is 
a relaxed Silicon Germanium (SiGe) layer having a thickness in a range of approximately O.lfim 
to 3.0nrn. 

7. (original) The method of claim 1 wherein the layer of oxide is deposited at a 
thickness range of approximately 50 to 3000A. 

8. (original) The method of claim 2 wherein the hydrogen is implanted at an energy 
range of approximately 1 to 20keV. 

9. (original) The method of claim 3 wherein the second temperature is higher than 
the first temperature. 

10. (original) The method of claim 3 wherein the first temperature is in a range of 
approximately 100 *C to 300 °C 

1 1 . (original) The method of claim 3 wherein the second temperature is in a range of 
400°Cto 600 °C. 

12. (original) The method of claim 1 further comprising: 

etching the first base substrate, and the layer of relaxed film to result in the strain 
of film on the surface of the SOI wafer. 

13. (original) The method of claim 12 wherein the etching of the first layer of 
strained Film comprises wet etching the layer of relaxed film. 

14-19. (canceled) 

20. (withdrawn) A method comprising: 
forming a relaxed layer on a silicon layer; 
forming a strained layer on the relaxed layer; 

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AppJ.No. 10/774 J 66 

Anidt, Dated 07-29-2005 

Reply to Office action of 06- 1 4-2005 

creating an embrittled region in one of the relaxed and strained layers; and 
transferring the strained layer to top of a wafer by heat treatment, the water having a base 
substrate and an oxidized film. 

21. (withdrawn) The method of claim 20 wherein forming a relaxed Jayer comprises: 
forming a relaxed silicon germanium (SiGe) layer having a thickness in a range of O.lfim 

to 3.0^m. 

22. (withdrawn) The method of claim 20 wherein creating comprises: 
creating the embrittled region by an ion implantation. 

23. (withdrawn) The method of claim 20 wherein creating comprises: 
creating the embrittled region by an ion implantation using an energy range of 

approximately 1 keV to 20 keV. 

24. (withdrawn) The method of claim 20 wherein creating comprises: 

creating the embrittled region by an ion implantation using a dose range of approximately 
lE16/cm 3 to lE18/cm 3 . 

25. (withdrawn) The method of claim 20 wherein transferring comprises: 
bonding the strained layer to the oxidized wafer by a first heat treatment in a range of 

approximately 100°C to 300°C; and 

separating the strained layer from the relaxed layer at the embrittled region by a second 
heat treatment in a range of approximately 400°C to 600°C. 



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